By Michael Meyers
Mike Meyers has performed it back. the number 1, best-selling examine consultant for CompTIA's A+ Certification checks has been thoroughly revised and up to date for the recent 2001 assessments. Written by means of the industry's major authority on A+ Certification, this must-have reference bargains whole assurance of all fabric on either the center and working process applied sciences assessments. Plus, the bonus CD-ROM comprises 6 perform assessments, hundreds and hundreds of questions, and LearnKey(tm) videos. This finished advisor not just is helping you cross the A+ certification tests, but additionally teaches you the way to be a professional technician.
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Extra info for All-in-one A+ certification exam guide
Think about it. When you want to add RAM, you have to populate an entire row, right? If you want to remove RAM, again you must remove an entire row. So why mess with individual chips when 99 percent of the time you have to deal with entire rows? This demand created a new type of DRAM package. Instead of individual chips inserted into individual sockets, the RAM was soldered to a small board that could be inserted into the motherboard. This type of package was called a SIPP (single in-line pin package).
I always get the fastest SDRAM I can afford, even if the motherboard doesn't require it. For example, if I build a Celeron system, I could get away with 66MHz DIMMs. I would buy at least PC-100 DIMMs, however, because I want RAM that will last for a while. Who knows when I'm going to upgrade to a faster motherboard? ECC Many higher-end systems use a special type of RAM called ECC (error correction code) DRAM. ECC is a major advancement in error checking on DRAM. As mentioned earlier, DRAM rarely goes bad anymore, but it can still have the occasional "hiccup" that can cause data loss.
When the 286 CPUs arrived, an opportunity arose. Do you remember from Chapter 2 that a 286 had a 16-bit external data bus? With the right chipset, a 286 could access 16 bits every time memory was accessed. It would be much faster to access two bytes every time you went to RAM instead of just one (Figure 03-35). The only problem with this was that one row (or one SIMM) could give only one byte each time it was accessed, because that's all it was designed to do (Figure 03-36). A new type of 16-bit wide DRAM would have to be invented (which nobody wanted to do back then), or you could just install DRAM in pairs that worked together as a team (Figure 03-37).